I was reading the Cortex-M0 Technical Reference Manual, and have some confusion about the cycle counts in Table 3-1.
The table states that POP {<loreglist>,PC} takes 4+N[c] cycles.
In note c, it states

c. N is the number of elements in the stack-pop list including PC and assumes load or store does not generate a HardFault exception.

This is different from PUSH {<loreglist>}, PUSH {<loreglist>,LR}, and POP {<loreglist>}, which take 1+N[b] cycles, where note b states

b. N is the number of elements.

So my question is thus: what does it mean that the stack-pop list includes PC?
Does it mean that POP {PC} takes 4 or 4+1 cycles, and that POP {R4,PC} takes 4+1 or 4+1+1 cycles?