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SPI prototype in Verilog: Areas for code improvement

I’m working on an SPI in Verilog. I will post what I came up with here. This is an educational project compiled according to the general principle from Wikipedia. There is only one mode – exchange along the rising edge of synchronizing pulses.
The problem is this: my code is not very good. It does not implement all functions (only the basic one); due to confusion with discontinuous/continuous assignment, a discrepancy arises between the command for selecting peripherals and signals for the slave, etc.