RISC-V Jump and Branch offsets
I am confused about the behavior of the RISC-V assembler (rv64). Note that this question concerns how human-readable assembly is meant to behave, not how the machine instructions behave (that is clear).
GCC Compile-time switch for floating point support?
I am working on some programs for two different riscv processors. One is IMC, and the other is IMFC. I’d like to add a compile switch to my program to block out floating point code for the IMC target and leave it intact for the IMFC one. Ideally I’d get something that looks like this pseudo-code