Given a modern 64-bit architecture with 6-bytes used for each page pointer, 1 MB pages, and 16 GB installed memory:

a) How would I calculate how much memory can be addressed by the paging solution?

b) How would I calculate how large must each page table be?

I’m not looking for the answer. I would just appreciate a clear breakdown.

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64 bit architecture allows 2^{64} bytes to be addressed.

Six bytes is 48 bits, so the number of pages that can be addressed with a six byte page pointer is 2^{48}. Multiply that by a million to get the number of addressable bytes using 1 megabyte pages.

16 Gigabytes is approximately 2^{30}, and the paging solution already exceeds that capacity, even with a page size of 1 byte.

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