Given a modern 64-bit architecture with 6-bytes used for each page pointer, 1 MB pages, and 16 GB installed memory:
a) How would I calculate how much memory can be addressed by the paging solution?
b) How would I calculate how large must each page table be?
I’m not looking for the answer. I would just appreciate a clear breakdown.
64 bit architecture allows 264 bytes to be addressed.
Six bytes is 48 bits, so the number of pages that can be addressed with a six byte page pointer is 248. Multiply that by a million to get the number of addressable bytes using 1 megabyte pages.
16 Gigabytes is approximately 230, and the paging solution already exceeds that capacity, even with a page size of 1 byte.